mirror of
https://gitlab.com/qemu-project/qemu
synced 2025-04-29 09:22:36 +08:00
exec/cpu-all: remove this header
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250325045915.994760-16-pierrick.bouvier@linaro.org>
This commit is contained in:
Pierrick Bouvier
Richard Henderson
parent
d97c3b06de
commit
0df783b2fb
@ -35,7 +35,6 @@
|
||||
#include "qemu/rcu.h"
|
||||
#include "exec/log.h"
|
||||
#include "qemu/main-loop.h"
|
||||
#include "exec/cpu-all.h"
|
||||
#include "cpu.h"
|
||||
#include "exec/icount.h"
|
||||
#include "exec/replay-core.h"
|
||||
|
||||
@ -24,7 +24,6 @@
|
||||
#include "qom/object.h"
|
||||
#include "target/i386/kvm/hyperv-proto.h"
|
||||
#include "target/i386/cpu.h"
|
||||
#include "exec/cpu-all.h"
|
||||
#include "exec/target_page.h"
|
||||
|
||||
struct SynICState {
|
||||
|
||||
@ -1,25 +0,0 @@
|
||||
/*
|
||||
* defines common to all virtual CPUs
|
||||
*
|
||||
* Copyright (c) 2003 Fabrice Bellard
|
||||
*
|
||||
* This library is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU Lesser General Public
|
||||
* License as published by the Free Software Foundation; either
|
||||
* version 2.1 of the License, or (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public
|
||||
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
#ifndef CPU_ALL_H
|
||||
#define CPU_ALL_H
|
||||
|
||||
#include "hw/core/cpu.h"
|
||||
#include "exec/cpu-defs.h"
|
||||
|
||||
#endif /* CPU_ALL_H */
|
||||
@ -579,7 +579,7 @@ QEMU_BUILD_BUG_ON(offsetof(CPUState, neg) !=
|
||||
|
||||
static inline CPUArchState *cpu_env(CPUState *cpu)
|
||||
{
|
||||
/* We validate that CPUArchState follows CPUState in cpu-all.h. */
|
||||
/* We validate that CPUArchState follows CPUState in cpu-target.c */
|
||||
return (CPUArchState *)(cpu + 1);
|
||||
}
|
||||
|
||||
|
||||
@ -205,9 +205,6 @@ CPU_CONVERT(le, 64, uint64_t)
|
||||
* te : target endian
|
||||
* (except for byte accesses, which have no endian infix).
|
||||
*
|
||||
* The target endian accessors are obviously only available to source
|
||||
* files which are built per-target; they are defined in cpu-all.h.
|
||||
*
|
||||
* In all cases these functions take a host pointer.
|
||||
* For accessors that take a guest address rather than a
|
||||
* host address, see the cpu_{ld,st}_* accessors defined in
|
||||
|
||||
@ -8,7 +8,6 @@
|
||||
*/
|
||||
|
||||
#include "qemu/osdep.h"
|
||||
#include "exec/cpu-all.h"
|
||||
#include "accel/tcg/cpu-mmu-index.h"
|
||||
#include "exec/exec-all.h"
|
||||
#include "exec/target_page.h"
|
||||
|
||||
@ -289,8 +289,6 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags);
|
||||
int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
|
||||
int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
enum {
|
||||
FEATURE_ASN = 0x00000001,
|
||||
FEATURE_SPS = 0x00000002,
|
||||
|
||||
@ -2968,8 +2968,6 @@ static inline bool arm_sctlr_b(CPUARMState *env)
|
||||
|
||||
uint64_t arm_sctlr(CPUARMState *env, int el);
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
/*
|
||||
* We have more than 32-bits worth of state per TB, so we split the data
|
||||
* between tb->flags and tb->cs_base, which is otherwise unused for ARM.
|
||||
|
||||
@ -259,6 +259,4 @@ bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
|
||||
extern const MemoryRegionOps avr_cpu_reg1;
|
||||
extern const MemoryRegionOps avr_cpu_reg2;
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
#endif /* QEMU_AVR_CPU_H */
|
||||
|
||||
@ -158,6 +158,4 @@ void hexagon_translate_init(void);
|
||||
void hexagon_translate_code(CPUState *cs, TranslationBlock *tb,
|
||||
int *max_insns, vaddr pc, void *host_pc);
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
#endif /* HEXAGON_CPU_H */
|
||||
|
||||
@ -306,8 +306,6 @@ struct HPPACPUClass {
|
||||
ResettablePhases parent_phases;
|
||||
};
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
static inline bool hppa_is_pa20(const CPUHPPAState *env)
|
||||
{
|
||||
return env->is_pa20;
|
||||
|
||||
@ -2604,7 +2604,6 @@ static inline bool is_mmu_index_32(int mmu_index)
|
||||
#define CC_SRC2 (env->cc_src2)
|
||||
#define CC_OP (env->cc_op)
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
#include "svm.h"
|
||||
|
||||
#if !defined(CONFIG_USER_ONLY)
|
||||
|
||||
@ -504,8 +504,6 @@ static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc,
|
||||
*flags |= is_va32(env) * HW_FLAGS_VA32;
|
||||
}
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
#define CPU_RESOLVING_TYPE TYPE_LOONGARCH_CPU
|
||||
|
||||
void loongarch_cpu_post_init(Object *obj);
|
||||
|
||||
@ -596,8 +596,6 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
|
||||
MemTxResult response, uintptr_t retaddr);
|
||||
#endif
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
/* TB flags */
|
||||
#define TB_FLAGS_MACSR 0x0f
|
||||
#define TB_FLAGS_MSR_S_BIT 13
|
||||
|
||||
@ -411,8 +411,6 @@ void mb_translate_code(CPUState *cs, TranslationBlock *tb,
|
||||
#define MMU_USER_IDX 2
|
||||
/* See NB_MMU_MODES in cpu-defs.h. */
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
/* Ensure there is no overlap between the two masks. */
|
||||
QEMU_BUILD_BUG_ON(MSR_TB_MASK & IFLAGS_TB_MASK);
|
||||
|
||||
|
||||
@ -1258,8 +1258,6 @@ static inline int mips_env_mmu_index(CPUMIPSState *env)
|
||||
return hflags_mmu_index(env->hflags);
|
||||
}
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
/* Exceptions */
|
||||
enum {
|
||||
EXCP_NONE = -1,
|
||||
|
||||
@ -334,8 +334,6 @@ void cpu_openrisc_count_stop(OpenRISCCPU *cpu);
|
||||
|
||||
#define CPU_RESOLVING_TYPE TYPE_OPENRISC_CPU
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
#define TB_FLAGS_SM SR_SM
|
||||
#define TB_FLAGS_DME SR_DME
|
||||
#define TB_FLAGS_IME SR_IME
|
||||
|
||||
@ -1704,8 +1704,6 @@ void ppc_compat_add_property(Object *obj, const char *name,
|
||||
uint32_t *compat_pvr, const char *basedesc);
|
||||
#endif /* defined(TARGET_PPC64) */
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
/*****************************************************************************/
|
||||
/* CRF definitions */
|
||||
#define CRF_LT_BIT 3
|
||||
|
||||
@ -634,8 +634,6 @@ G_NORETURN void riscv_raise_exception(CPURISCVState *env,
|
||||
target_ulong riscv_cpu_get_fflags(CPURISCVState *env);
|
||||
void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong);
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
FIELD(TB_FLAGS, MEM_IDX, 0, 3)
|
||||
FIELD(TB_FLAGS, FS, 3, 2)
|
||||
/* Vector flags */
|
||||
|
||||
@ -147,8 +147,6 @@ void rx_translate_code(CPUState *cs, TranslationBlock *tb,
|
||||
int *max_insns, vaddr pc, void *host_pc);
|
||||
void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte);
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
#define CPU_INTERRUPT_SOFT CPU_INTERRUPT_TGT_INT_0
|
||||
#define CPU_INTERRUPT_FIR CPU_INTERRUPT_TGT_INT_1
|
||||
|
||||
|
||||
@ -948,6 +948,4 @@ uint64_t s390_cpu_get_psw_mask(CPUS390XState *env);
|
||||
/* outside of target/s390x/ */
|
||||
S390CPU *s390_cpu_addr2state(uint16_t cpu_addr);
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
#endif
|
||||
|
||||
@ -288,8 +288,6 @@ void cpu_load_tlb(CPUSH4State * env);
|
||||
/* MMU modes definitions */
|
||||
#define MMU_USER_IDX 1
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
/* MMU control register */
|
||||
#define MMUCR 0x1F000010
|
||||
#define MMUCR_AT (1<<0)
|
||||
|
||||
@ -729,8 +729,6 @@ static inline int cpu_pil_allowed(CPUSPARCState *env1, int pil)
|
||||
#endif
|
||||
}
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
#ifdef TARGET_SPARC64
|
||||
/* sun4u.c */
|
||||
void cpu_tick_set_count(CPUTimer *timer, uint64_t count);
|
||||
|
||||
@ -251,8 +251,6 @@ void fpu_set_state(CPUTriCoreState *env);
|
||||
|
||||
#define MMU_USER_IDX 2
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
FIELD(TB_FLAGS, PRIV, 0, 2)
|
||||
|
||||
void cpu_state_reset(CPUTriCoreState *s);
|
||||
|
||||
@ -733,8 +733,6 @@ static inline uint32_t xtensa_replicate_windowstart(CPUXtensaState *env)
|
||||
#define XTENSA_CSBASE_LBEG_OFF_MASK 0x00ff0000
|
||||
#define XTENSA_CSBASE_LBEG_OFF_SHIFT 16
|
||||
|
||||
#include "exec/cpu-all.h"
|
||||
|
||||
static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, vaddr *pc,
|
||||
uint64_t *cs_base, uint32_t *flags)
|
||||
{
|
||||
|
||||
@ -37,7 +37,7 @@ static void check_max_alignment(unsigned a_bits)
|
||||
{
|
||||
/*
|
||||
* The requested alignment cannot overlap the TLB flags.
|
||||
* FIXME: Must keep the count up-to-date with "exec/cpu-all.h".
|
||||
* FIXME: Must keep the count up-to-date with "exec/tlb-flags.h".
|
||||
*/
|
||||
if (tcg_use_softmmu) {
|
||||
tcg_debug_assert(a_bits + 5 <= tcg_ctx->page_bits);
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user