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cleanup: Re-run return_directly.cocci
Coccinelle's indentation of virt_create_plic() results in a long line. Avoid that by mimicking the old indentation manually. Don't touch tests/tcg/mips/user/. I'm not sure these files are ours to make style cleanups on. They might be imported third-party code, which we should leave as is to not complicate future updates. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250407082643.2310002-2-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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@ -118,11 +118,8 @@ static void pca9554_write(PCA9554State *s, uint8_t reg, uint8_t data)
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static uint8_t pca9554_recv(I2CSlave *i2c)
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{
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PCA9554State *s = PCA9554(i2c);
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uint8_t ret;
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ret = pca9554_read(s, s->pointer & 0x3);
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return ret;
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return pca9554_read(s, s->pointer & 0x3);
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}
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static int pca9554_send(I2CSlave *i2c, uint8_t data)
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@ -209,7 +209,6 @@ static int xen_xenstore_post_load(void *opaque, int ver)
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{
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XenXenstoreState *s = opaque;
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GByteArray *save;
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int ret;
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/*
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* As qemu/dom0, rebind to the guest's port. The Windows drivers may
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@ -231,8 +230,7 @@ static int xen_xenstore_post_load(void *opaque, int ver)
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s->impl_state = NULL;
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s->impl_state_size = 0;
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ret = xs_impl_deserialize(s->impl, save, xen_domid, fire_watch_cb, s);
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return ret;
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return xs_impl_deserialize(s->impl, save, xen_domid, fire_watch_cb, s);
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}
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static const VMStateDescription xen_xenstore_vmstate = {
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@ -1276,27 +1276,22 @@ static FWCfgState *create_fw_cfg(const MachineState *ms)
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static DeviceState *virt_create_plic(const MemMapEntry *memmap, int socket,
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int base_hartid, int hart_count)
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{
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DeviceState *ret;
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g_autofree char *plic_hart_config = NULL;
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/* Per-socket PLIC hart topology configuration string */
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plic_hart_config = riscv_plic_hart_config_string(hart_count);
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/* Per-socket PLIC */
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ret = sifive_plic_create(
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memmap[VIRT_PLIC].base + socket * memmap[VIRT_PLIC].size,
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plic_hart_config, hart_count, base_hartid,
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VIRT_IRQCHIP_NUM_SOURCES,
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((1U << VIRT_IRQCHIP_NUM_PRIO_BITS) - 1),
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VIRT_PLIC_PRIORITY_BASE,
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VIRT_PLIC_PENDING_BASE,
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VIRT_PLIC_ENABLE_BASE,
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VIRT_PLIC_ENABLE_STRIDE,
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VIRT_PLIC_CONTEXT_BASE,
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VIRT_PLIC_CONTEXT_STRIDE,
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memmap[VIRT_PLIC].size);
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return ret;
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return sifive_plic_create(
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memmap[VIRT_PLIC].base + socket * memmap[VIRT_PLIC].size,
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plic_hart_config, hart_count, base_hartid,
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VIRT_IRQCHIP_NUM_SOURCES,
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((1U << VIRT_IRQCHIP_NUM_PRIO_BITS) - 1),
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VIRT_PLIC_PRIORITY_BASE, VIRT_PLIC_PENDING_BASE,
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VIRT_PLIC_ENABLE_BASE, VIRT_PLIC_ENABLE_STRIDE,
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VIRT_PLIC_CONTEXT_BASE,
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VIRT_PLIC_CONTEXT_STRIDE,
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memmap[VIRT_PLIC].size);
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}
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static DeviceState *virt_create_aia(RISCVVirtAIAType aia_type, int aia_guests,
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@ -242,10 +242,7 @@ static uint32_t esp_get_stc(ESPState *s)
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static uint8_t esp_pdma_read(ESPState *s)
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{
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uint8_t val;
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val = esp_fifo_pop(s);
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return val;
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return esp_fifo_pop(s);
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}
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static void esp_pdma_write(ESPState *s, uint8_t val)
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@ -110,8 +110,6 @@ static bool vfio_multiple_devices_migration_is_supported(void)
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int vfio_block_multiple_devices_migration(VFIODevice *vbasedev, Error **errp)
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{
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int ret;
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if (vfio_multiple_devices_migration_is_supported()) {
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return 0;
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}
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@ -129,9 +127,8 @@ int vfio_block_multiple_devices_migration(VFIODevice *vbasedev, Error **errp)
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error_setg(&multiple_devices_migration_blocker,
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"Multiple VFIO devices migration is supported only if all of "
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"them support P2P migration");
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ret = migrate_add_blocker_normal(&multiple_devices_migration_blocker, errp);
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return ret;
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return migrate_add_blocker_normal(&multiple_devices_migration_blocker,
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errp);
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}
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void vfio_unblock_multiple_devices_migration(void)
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@ -237,12 +237,10 @@ uint64_t qemu_plugin_tb_vaddr(const struct qemu_plugin_tb *tb)
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struct qemu_plugin_insn *
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qemu_plugin_tb_get_insn(const struct qemu_plugin_tb *tb, size_t idx)
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{
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struct qemu_plugin_insn *insn;
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if (unlikely(idx >= tb->n)) {
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return NULL;
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}
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insn = g_ptr_array_index(tb->insns, idx);
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return insn;
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return g_ptr_array_index(tb->insns, idx);
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}
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/*
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@ -364,8 +364,6 @@ static void test_watchdog_inten_luminary(const void *ptr)
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int main(int argc, char **argv)
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{
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int r;
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g_test_init(&argc, &argv, NULL);
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g_test_set_nonfatal_assertions();
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@ -393,7 +391,5 @@ int main(int argc, char **argv)
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test_watchdog_inten);
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}
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r = g_test_run();
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return r;
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return g_test_run();
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}
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@ -191,12 +191,10 @@ static uint8_t pnv_i2c_pca9554_read_pins(PnvI2cDev *dev)
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{
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uint8_t send_buf[1];
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uint8_t recv_buf[1];
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uint8_t inputs;
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send_buf[0] = PCA9554_INPUT;
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pnv_i2c_send(dev, send_buf, 1);
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pnv_i2c_recv(dev, recv_buf, 1);
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inputs = recv_buf[0];
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return inputs;
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return recv_buf[0];
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}
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static void pnv_i2c_pca9554_flip_polarity(PnvI2cDev *dev)
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@ -360,8 +360,6 @@ static void test_clock_enable(void)
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int main(int argc, char **argv)
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{
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int ret;
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g_test_init(&argc, &argv, NULL);
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g_test_set_nonfatal_assertions();
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@ -372,8 +370,6 @@ int main(int argc, char **argv)
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qtest_add_func("stm32l4x5/usart/send_str", test_send_str);
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qtest_add_func("stm32l4x5/usart/ack", test_ack);
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qtest_add_func("stm32l4x5/usart/clock_enable", test_clock_enable);
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ret = g_test_run();
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return ret;
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return g_test_run();
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}
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@ -71,7 +71,6 @@ static void compute_default_paths(void)
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static int is_intel_processor(void)
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{
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int result;
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int ebx, ecx, edx;
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/* Execute CPUID instruction with eax=0 (basic identification) */
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@ -87,9 +86,7 @@ static int is_intel_processor(void)
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* 0x49656e69 = "ineI"
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* 0x6c65746e = "ntel"
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*/
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result = (ebx == 0x756e6547) && (edx == 0x49656e69) && (ecx == 0x6c65746e);
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return result;
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return (ebx == 0x756e6547) && (edx == 0x49656e69) && (ecx == 0x6c65746e);
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}
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static int is_rapl_enabled(void)
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